D.Module2.C6747

TMS320C6747 DSP Module

The D.Module2.C6747 offers versatile embedded DSP single board solution for developers requiring an integrated floating point processor with extensive communications and I/O capabilities.

It is primarily designed for OEM developers looking to reduce time to market while lowering total cost. It can be used as a stand-alone system, or as a mezzanine daughtercard embedded within a larger system or board design.

D.Module2.C6747 DSP Module

The D.Module.C6747 design incorporates a floating point TMS320C6747 DSP Processor, with SDRAM, FLASH ROM, USB 2.0, USB 1.1 with host capability, two UARTS with RS232 and RS422 line drivers, a 100Base-T Ethernet Controller with a 2-port switch, and a 100MHz peripheral bus interface.

A versatile set of peripherals is available to attach sensors and actuators: two quadrature decoders, up to six high resolution PWM channels, three capture modules, two timers, I²C, SPI, and 16 GPIO signals. If mass storage is required, an optional NAND Flash or a Multi-Media/SD Card can be attached to the module. A Real-Time Clock is provided to add timestamps and/or trigger long-term data acquisitions. Data converters can be connected serially via two McASP ports or via the parallel 16/32-bit expansion bus.

The D.Module2.C6747 is a low power device: the typical operating power is just 2.5W. Flexible power and clock control features allow to reduce the power consumption even further.

A base board D.Module2.Base is available for prototyping and evaluation.

Modular Self Stacking & Extending Functionality

The modular, self-stacking concept facilitates building complete signal processing systems and allows for the addition of FPGA boards into the signal processing chain, between the data acquisition front end and the DSP. All on-board peripherals are comfortably initialized and programmed via D.Module2.BIOS functions.

In situations where additional functionality is required, developers can extend the capabilities of the D.Module2.C6747, using optionally available data acquisition and I/O modules, or with their own application-specific hardware. External hardware is easily interfaced with the TMS320C6747 processor via its 100MHz peripheral bus interface

Product Features

DSP TMS320C6747 300, 375, or 456MHz floating-point, up to 2400, 3000, or 3648 MMACS
Memory DSP-internal 32K bytes data cache, 32K bytes program cache
256K bytes direct mapped or level-2 cache
128K bytes shared RAM
SDRAM 64M bytes, 133 MHz operation, 32-bit wide, 512M bytes/s peak throughput
Flash 8M bytes, SPI interface, sector architecture
optional NAND Flash
SD/Multi-Media-Card Interface∗
Ethernet 100Base-Tx / 10Base-T MAC integrated in TMS320C6747
Onboard PHY with 2-port switch
100Base-Fx Fiber support on port 1
highly optimized zero-copy TCP/IP stack
USB 2.0 OTG
1.1 Host
480 Mbit/s
12 MBit/s
UART 2∗ UART 0: RS232 line interface, max. 230.4K baud, automatic hardware flow-control
UART 1: RS422/485 line interface, max. 3M baud 
both UARTs: transmit and receive FIFOs, DMA support
External Bus Interface 16/32-bit data bus
14-bit address range
programmable bus timing and external wait states
up to 40M bytes/s transfer rate
two individually programmable memory areas
Timer 3∗ two 32/64 bit in DSP
16-bit high-speed timer (10ns resolution) in board logic
Serial Ports 2 McASP∗ independent receiver and transmitters, 64 word FIFOs, up to 50Mbps throughput
McASP0: max. 3 receive/transmit channels
McASP1: max. 8 receive/transmit channels
GPIO 16 16 programmable in board-logic
unused DSP signals can be configured as additional GPIO
I²C 1∗ up to 400kbps, 7 and 10 bit addressing modes
SPI 1∗ up to 50Mbps, slave and 4/5-wire master mode
Quadrature Decoder 2∗ supports quadrature and direction/count mode
Index and Strobe inputs, 32 bit counter registers, watchdog
PWM 3 / 6∗ 16-Bit Time-Base Counter
6 Single Edge, 6 Dual Edge Symmetric or 3 Dual Edge Asymmetric Outputs
Dead-Band, PWM Chopping, Trip Zone
Capture Timer 3∗ up to 4 events per channel, also configurable as auxillary PWM
Real Time Clock (RTC) 1 provision for buffer capacitor (0.2F) and external power supply
Miscellaneous jumperless design
Watchdog
JTAG Emulation Interface
Software D.Module2.BIOS initialization and programming algorithms for all on board resources
D.SignT.TCP/IP stack highly optimized zero-copy stack, evaluation license included with DS.C6747 development base package, unlimited OEM license available
Setup Utility USB- and RS232-based field maintenance tool for program and data uploads, User-CPLD reprogramming, diagnostics
Module Config File ASCII configuration file for application-specific settings
Power Supply 3.3V single supply
Mechanics 87 x 58 x 15 mm self-stacking design, board-spacing 10mm
four IEEE-1386 high-density connectors
RoHS conformity yes