TMS320DM642 Integer DSP Module
The D.Module2.DM642 offers versatile embedded DSP single board solution for developers requiring an integrated digital signal processor with extensive communications and I/O capabilities.
It is primarily designed for OEM developers looking to reduce time to market while lowering total cost. It can be used as a stand-alone system, or as a mezzanine daughtercard embedded within a larger system or board design.
5760 MIPS, 64 Mbytes SDRAM with 1 Gbyte/s throughput and a 533 Mbyte/sec peripheral bus provide adequate processing power and bandwidth for demanding applications and efficiently cooperate with FPGAs. Communication interfaces are USB2.0, two UARTs with RS232 and RS422 line drivers, and a 100Base-T Ethernet Controller. I²C, SPI, and 16 GPIO signals are available to control data acquisition peripherals and interface with other system components. High-speed data converters, CMOS cameras, and video encoders/decoders can be directly connected to the DSP via three 80MHz capture/display ports with integrated FIFOs.
The modular, self-stacking concept facilitates building complete signal processing systems and allows to insert FPGA boards into the signal processing chain, between the data acquisition front end and the DSP. All on-board peripherals are comfortably initialized and programmed via BIOS functions.
A base board D.Module2.Base is available for prototyping and evaluation.
The modular, self-stacking concept facilitates building complete signal processing systems and allows for the addition of FPGA boards into the signal processing chain, between the data acquisition front end and the DSP. All on-board peripherals are comfortably initialized and programmed via D.Module2.BIOS functions.
In situations where additional functionality is required, developers can extend the capabilities of the D.Module2.DM642, using optionally available data acquisition and I/O modules, or with their own application-specific hardware. External hardware is easily interfaced with the TMS320DM642 processor via its external bus interface
|DSP||TMS320DM642||720 MHz fixed-point, 8/16/32/64-bit native data support, up to 5760 million instructions per second|
|Memory||DSP-internal||256 Kbyte direct mapped or level-2 cache, 16 Kbyte data cache, 16 Kbyte program cache|
|SDRAM||64 Mbyte, 133 MHz operation, 64-bit wide, 1 GByte/s throughput|
|Flash||8 MByte, 8-bit wide, sector architecture|
|Video Ports||Port0: 12 bit wide
Port1: 10 bit wide
Port2: 20 bit wide
|up to 80 MHz, capture and display, integrated Fifos, support raw, BT.656 and Y/C (port2 only) format
glueless interface to most CMOS cameras, video encoder and decoder, high-speed ADCs and DACs
|USB||2.0 (480 Mbit/s)
1.1 (12 Mbit/s)
|Philips isp1582, up to 14 endpoints, 8 Kbyte shared FIFO, DMA support|
|Ethernet||100Base-Tx / 10Base-T||MAC integrated in DM642, onboard PHY and magnetics
highly optimized zero-copy TCP/IP stack
|UART||2||16C752, max. 230.4 Kbaud RS232, 3 Mbaud RS422/485,
64 byte transmit and receive FIFOs, DMA support
hardware and software auto flow-control
RS232 and RS422/485 line interface
|External Bus Interface||32-bit data
|supports asynchronous and synchronous transfers
programmable wait states and clock (83/100/125/133 MHz)
up to 533 Mbyte/s transfer rate
|Serial Ports||2||independent receiver and transmitter, up to 150 MBit/s throughput|
|GPIO||16||8 programmable in board-logic, 8 from DSP|
JTAG Emulation Interface
|Software||D.Module2.BIOS||initialization and programming algorithms for all on board resources|
|D.SignT.TCP/IP stack||highly optimized zero-copy stack, evaluation license included with DS.DM642 development base package, unlimited OEM license available|
|Setup Utility||USB- and RS232-based field maintenance tool for program and data uploads, User-CPLD reprogramming, diagnostics|
|Module Config File||ASCII configuration file for application-specific settings|
|Power Supply||3.3V||single supply|
|Mechanics||87 x 58 x 15 mm||self-stacking design, board-spacing 10mm
four IEEE-1386 high-density connectors